(a) A Transistor is a device made up of doped semiconductor, where either a P-type semiconductor is sandwiched between two n-type semiconductors on either side semiconductor called as an n-p-n transistor or an n-type is sandwiched between 2 p-type semiconductor called as n-p-n transistor

We know majority charge carriers in a p-type semiconductor are holes which can be considered as a positive charge species having charge + e, and direction of movement of holes is direction of current, and in n-type semiconductor majority charge carriers are electrons .direction of current is opposite to direction of flow of electron, at the junction of p-type and n-type semiconductor depletion layer is formed due to diffusion of holed and electron and this high resistance region does not allow holes or electrons to move from one region to another.in such a case if p-type semiconductor is given high voltage and n-type is given low voltage it is called forward biasing, and it reduces the resistance and hence allow holes and electron to move from p side to n side and n side to p side respectively where as if p-type is connected to low voltage and n side to high voltage such a situation is called reverse biasing which further increases resistance of depletion region and does not allow charge carriers to diffuse from one side to another,

Let us consider a pnp transistor, which consists of three parts

Emitter: This is the segment on one side of the transistor It is of moderate size and heavily doped. It supplies a large number of majority carriers for the current flow through the transistor.in PnP transistor emitter is p type

Base: This is the central segment. It is very thin and lightly doped. in PnP transistor base will be n type

Collector: This segment collects a major portion of the majority

carriers supplied by the emitter. The collector side is moderately

doped and larger in size as compared to the emitter.in pnp transistor collector will be of P type

the diagram and symbol of pnp transistor is as shown

there will be two depletion region formed one at emitter-base junction and other at base-collector junction, usually emitter-base junction is forward Baised i.e. emitter is connected to positive terminal of battery with potential V_EE, collector-base junction is revere baised so collector is connected to negative terminal of a battery with voltage V_cc, base is connected to common terminal of both the batteries to ground current flowing through battery to emitter is called emitter current I_E and current flowing from collector to battery is collector current I_C flowing through base is called base current I_B

The circuit diagram is as shown

The heavily doped emitter has a high concentration of majority carriers, which will be holes in a p-n-p transistor. These majority carriers enter the base region in large numbers. The base is thin and lightly doped. So the majority carriers there would be few. In a p-n-p transistor, the majority carriers in the base are electrons since the base is of an n-type semiconductor.

A large number of holes entering the base from the emitter swamps the small number of electrons there. As the base collector-junction is reverse biased, these holes, which appear as minority carriers at the junction, can easily cross the junction and enter the collector. The holes in the base could move either towards the base terminal to combine with the electrons entering from outside or cross the junction to enter into the collector and reach the collector terminal. The base is made thin so that most of the holes find themselves near the reverse-biased base-collector junction and so cross the junction instead of moving to the base terminal.

due to forward bias a large current enters the emitter-base junction, but most of it is diverted to adjacent reverse-biased base-collector junction and the current coming out of the base becomes a very small fraction of the current that entered the junction. If we represent the hole current and the electron current crossing the forward biased junction by I_h and I_e respectively then the total current in a forward biased diode is the sum I_h + I_e .We see that the emitter current is

I_E = I_h + I_e

Base current is very very less then emitter current because a major part of emitter current goes to collector instead of coming out of the base terminal. The base current is thus a small fraction of the emitter current. The current entering into the emitter from outside is equal to the emitter current I_E. Similarly the current emerging from the base terminal is I_B and that from collector terminal is I_C. so we can conclude using Kirchoff’s Junction rule that the emitter current is the sum of collector current and base current

i.e. I_E = I_B + I_C

Kirchoff’s Junction rule : sum of net current at a junction is equal to net current leaving the junction, here Collector current and base current are coming at junction from Collector and base respectively and emitter current is leaving the junction

(b) Here we are given three Nand Gates connected to each other in a definite arrangement

For a nand gate with two terminals A and B and giving output Y

As Shown Below

The Logic Followed is

The truth table of a Nand Gate is as shown below

let us name the Gates as I, II, III to identify output coming from each gate

As we can see the output from Gates, I and II will act as input for Gate III Let us say output from A is Y_I and From Gate B is Y_II

Two inputs of Both I and II (A and B) are sorted, i.e. they will have only two set of inputs (1,1) and (0,0) So when

A = 0, input for I will be (0,0) so output Y_I will be 1, and when

A = 1, input for I will be (1,1) so output Y_I will be 0

Similarly fore logic Gate II when

B = 0, input for II will be (0,0) so output Y_II will be 1, and when

B = 1, input for II will be (1,1) so output Y_II will be 0

There can be two inputs A and B, which can only have two values 0 or 1 so number of combinations possible is

2² = 4

Now output Y_I and Y_II will act as input for gate III

So the corresponding truth table of the combination will be

Now the relation of the combination of gates between inputs A and B and output Y is same as that of a OR gate as shown Below

It follows the logic

Y = A + B

The truth Table is as shown below

Since truth table of the combination of nand gates is same as that of an OR gate, so it carries out OR logic operation or operation of addition or summation of binary digits.

OR

A Transistor is a device made up of doped semiconductor, where either a P type semiconductor is sandwiched between two n type semiconductors on either side semiconductor called as a n-p-n transistor or a n type is sandwiched between 2 p type semiconductor called as n-p-n transistor

A transistor consists of three parts

Emitter: This is the segment on one side of the transistor It is of moderate size and heavily doped. It supplies a large number of majority carriers for the current flow through the transistor.in nPn transistor emitter is n type

Base: This is the central segment. It is very thin and lightly doped. in nPn transistor base will be p type

Collector: This segment collects a major portion of the majority

carriers supplied by the emitter. The collector side is moderately

doped and larger in size as compared to the emitter.in npn transistor collector will be of n type

the diagram and symbol of npn transistor is as shown

To study input and output characteristics in common emitter configuration, the base is forward Biased, connected to positive terminal of battery V_BB and Collector is reverse biased, connected to Positive terminal of battery V_CC .The emitter terminal is connected in common to both the negative terminals of battery. the input is between the base and the emitter and the output is between the collector and the emitter.

The Circuit Diagram is as Shown

The variation of the base current I_B with the base-emitter voltage V_BE is called the input characteristic. Similarly, the variation of the collector current I_C with the collector-emitter voltage V_CE is called the output characteristic. Base current I_B and collector current I_C are measured with ammeters and voltage between collector and emitter V_CE and voltage between Base and emitter V_BE is measured with two voltmeters two resistances R₁ and R₂ are connected in series at input and output respectively.

To study the input characteristics of the transistor in Common Emitter configuration, a curve is plotted between the base current I_B against the base-emitter voltage V_BE. The collector-emitter voltage VCE is kept fixed to study the dependence of I_B on V_BE. The collector emitter voltage V_CE is kept large to make it reverse Biased and is Kept fixed while studying input characteristics. Input characteristics can be studied for various values of V_CE .

Input Characteristics have been shown in Graph

The output characteristic is obtained by observing the variation of Collector Current I_C Collector Emitter Voltage V_CE is varied keeping Base Current I_B constant. The plot of IC versus VCE for different fixed values of IB gives output characteristics. So there will be different output characteristics corresponding to different values of Base current I_B.

Output Characteristics have been shown in Graph

Current amplification factor is defined as the ratio of the change in collector current I_C (Output Current) to the change in base current I_B (Input Current) at a constant collector-emitter voltage (V_CE) when the transistor is in active state (Base Forward Biased and Collector Reverse Biased)

i.e. at constant V_CE

Where